The National Security Agency has unveiled four reports that seek to help the Department of Defense safeguard programmable microelectronic components from adversary influence and cybersecurity threats.
The cybersecurity technical reports issued by the Joint Federated Assurance Center Hardware Assurance Lab at NSA intend to ensure the security of field-programmable gate arrays during production, programming, acquisition and initial device attachment processes, the agency said Thursday.
The document FPGA Overall Assurance Process offers information on the process used by NSA JFAC to come up with threat categories and mitigations and seeks to help teams mimic the assurance work for other microelectronic device types.
The other three reports are the Field-Programmable Gate Array Best Practices-Threat Catalog; Field-Programmable Gate Array Level of Assurance 1 Best Practices and Third-Party IP Review Process for Level of Assurance 1.
NSA JFAC provides remediation capabilities, vulnerability detection and analysis support to help DOD strengthen microelectronics hardware assurance for its programs.